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[Other resource] DDS_sin

Description: 用VHDL语言实现DDS直接数字频率合成器的设计，采用正弦RAM表，可实现频率可控的正弦数字信号，编译、仿真通过。-VHDL DDS Direct Digital Frequency Synthesizer Design using sinusoidal RAM table achieve controllable frequency sinusoidal digital signal, compile, through simulation.
Platform: | Size: 8747 | Author: sarahyu | Hits:

[Other resource] RAM_VHDL_34

Description: RAM之VHDL描述 RAM之VHDL描述-RAM's VHDL description RAM's VHDL description RAM's VH DL described in VHDL's RAM
Platform: | Size: 5418 | Author: Nicholas | Hits:

[Other resource] vhdl_sw_lr

Description: 我自己写的vhdl程序，内有画图器，ram 和控制ram。还有test bentch。-I wrote it myself vhdl procedures, which are drawing device, and control of ram ram. There bentch test.
Platform: | Size: 16374 | Author: 王大宝 | Hits:

[Other resource] 128×16ram

Description: VHDL程序设计的RAM存储器，双端口，128×16比特
Platform: | Size: 863 | Author: petri | Hits:

[Other] ramchoice

Description: 多总线切换的VHDL代码。可用于多RAM的管理。
Platform: | Size: 1189 | Author: 祝箭 | Hits:

[Other resource] fftinterface

Description: 电赛一等奖作品：音频信号分析仪的FPGA源码，VHDL编写，Quartus7.1综合，ModelSim6.2g se仿真，应用了opencores.org上的开源FFT IP核，加入了8051总线接口和ram
Platform: | Size: 4933712 | Author: 李星 | Hits:

[Other resource] acordwithram

Description: 一个牛人写的很快且不用状态机的动态RAM接口,VHDL编写
Platform: | Size: 6176 | Author: john | Hits:

[Other resource] sdram_ctrl.tar

Description: 同步动态RAM的控制电路VHDL源代码,在SOC开发中可以直接应用
Platform: | Size: 89613 | Author: 26 | Hits:

[Other] ddr_ctrlv

Description: ddr ram controller vhdl code
Platform: | Size: 55711 | Author: heyong | Hits:

[Other resource] doubleportram

Description: 高速双端口RAM的vhdl实现。包含仿真波形
Platform: | Size: 303585 | Author: liujingxing | Hits:

[Other resource] DPRAM

Description: 利用vhdl编写的双端口Ram程序，不带数据纠错处理
Platform: | Size: 1034 | Author: 孙敬辉 | Hits:

[Embeded-SCM Develop] ram_dual

Description:

使用VHDL设计的ram,可以参考


Platform: | Size: 479 | Author: xuyanxia | Hits:

[Applications] ZBT SRAM

Description: 用verilog HDL写的操作SRAM的源码-with Verilog HDL write operation SRAM FOSS
Platform: | Size: 6144 | Author: 刘波 | Hits:

[VHDL-FPGA-Verilog] vhdlprogram

Description: 用复杂可编程逻辑器件(CPLD)实现的数字钟控系统-with complex programmable logic devices (CPLD) with a digital clock control system
Platform: | Size: 5120 | Author: 王永 | Hits:

[Other Embeded program] ip

Description: usart的verilog代码.rar 包括很多的FPGA ip 源码，可以直接应用 uart_vhdl.zip sl811usb包含源程序.rar mc8051_design.zip mcpu_1[1].05.zip minicpu.zip mmc_lark_original.zip -USART the Verilog code. rar, including many of the FPGA ip source, can be applied directly uart_vhdl.zipsl811usb contains the source code. rarmc8051_design.zipmcpu_1 [1] .05. zipminicpu.zipmmc_lark_original.zip
Platform: | Size: 5391360 | Author: 钟阳 | Hits:

[VHDL-FPGA-Verilog] 62256

Description: EPM1270和ram62256的verilog接口程序，用QuartusII编译
Platform: | Size: 323584 | Author: 汉武帝 | Hits:

[VHDL-FPGA-Verilog] SRAM

Description:
Platform: | Size: 1024 | Author: | Hits:

[VHDL-FPGA-Verilog] T4_sdram_control

Description: verilog语言 利用FPGA控制SDRAM，相信很多朋友都需要 快下载吧-control FPGA Verilog language use SDRAM, believe that many of my friends need to download it faster
Platform: | Size: 19456 | Author: 杜菲 | Hits:

[VHDL-FPGA-Verilog] SRAM

Description: SRAM编译过的源代码 强烈推荐
Platform: | Size: 3072 | Author: JP | Hits:

[OS Develop] FIFO

Description: fifo.v verilog实现的先进先出存储器-fifo.vverilog realize the FIFO memory
Platform: | Size: 2048 | Author: patrick | Hits:
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